1
MHT CET 2026 17th April Evening Shift
MCQ (Single Correct Answer)
+1
-0
In common emitter configuration of transistor amplifier, $r_i$, $R_L$ and $\beta$ represent the input resistance, load resistance and the a.c. current gain respectively. The voltage gain $A_V$ and power gain $A_P$ are represented in magnitude respectively by
A
$\beta\left(\dfrac{r_i}{R_L}\right) , \beta^2\left(\dfrac{r_i}{R_L}\right)$
B
$\beta\left(\dfrac{R_L}{r_i}\right) , \beta\left(\dfrac{R_L}{r_i}\right)^2$
C
$\beta\left(\dfrac{R_L}{r_i}\right) , \beta^2\left(\dfrac{R_L}{r_i}\right)$
D
$\beta\left(\dfrac{r_i}{R_L}\right) , \beta\left(\dfrac{r_i}{R_L}\right)^2$
2
MHT CET 2026 17th April Evening Shift
MCQ (Single Correct Answer)
+1
-0
A semiconductor X is made by doping a germanium crystal with indium $(Z = 49)$. A second semiconductor Y is made by doping germanium crystal with arsenic $(Z = 33)$. Both are joined end to end and connected to a battery as shown. Which of the following statements is correct?
MHT CET 2026 17th April Evening Shift Physics - Semiconductor Devices and Logic Gates Question 27 English
A
X is p-type, Y is n-type and the junction is forward biased.
B
X is p-type, Y is n-type and the junction is reverse biased.
C
X is n-type, Y is p-type and the junction is forward biased.
D
X is n-type, Y is p-type and the junction is reverse biased.
3
MHT CET 2026 17th April Morning Shift
MCQ (Single Correct Answer)
+1
-0
To get the truth table shown from the following logic circuit, the gate G should be
MHT CET 2026 17th April Morning Shift Physics - Semiconductor Devices and Logic Gates Question 26 English
A
NAND gate.
B
NOR gate.
C
AND gate.
D
OR gate.
4
MHT CET 2026 17th April Morning Shift
MCQ (Single Correct Answer)
+1
-0
When the Zener diode is used as a voltage regulator, it is connected in
A
forward bias and in parallel with load.
B
reverse bias and in series with load.
C
forward bias and in series with load.
D
reverse bias and in parallel with load.

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