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1
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
Which one of the following statements regarding the $$INT$$ (interrupt) and the $$BRQ$$ (bus request) pins in a $$CPU$$ is true?
A
The $$BRQ$$ pin is sampled after every instruction cycle, but the $$INT$$ is sampled after every machine cycle
B
Both $$INT$$ and $$BRQ$$ are sampled after every machine cycle
C
The $$INT$$ pin is sampled after every instruction cycle, but the $$BRQ$$ is sampled after every machine cycle
D
Both $$INT$$ and $$BRQ$$ are sampled after every instruction cycle
2
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
The associated figure shows the two types of rotate right instruction $${R_1},\,{R_2}$$ available in a microprocessor where Register is a $$8$$-bit register and $$C$$ is the carry bit. The rotate left instructions $$L1$$ and $$L2$$ are similar except that $$C$$ now links the most significant bit of Register instead of the least significant one. GATE EE 2007 Digital Electronics - Microprocessor Question 11 English

Suppose Register contains the $$2's$$ complement number $$11010110.$$ If this number is delivered by $$2$$ the answer should be

A
$$01101011$$
B
$$10010101$$
C
$$11101001$$
D
$$11101011$$
3
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
In an $$8085$$ $$A$$ microprocessor based system, it is desired to increment the contents of memory location whose address is available in $$(D,E)$$ register pair and store the result in same location. The sequence of instructions is
A
$$XCHG,\,\,INR\,\,\,M$$
B
$$XCHG,\,\,INX\,\,\,H$$
C
$$INX\,\,D,\,\,XCHG$$
D
$$INR\,\,M,\,\,XCHG$$
4
GATE EE 2006
MCQ (Single Correct Answer)
+2
-0.6
A software delay subroutine is written as given below: GATE EE 2006 Digital Electronics - Microprocessor Question 14 English

How many times $$DCR$$ $$L$$ instruction will be executed?

A
$$255$$
B
$$510$$
C
$$65025$$
D
$$65279$$
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Boolean Algebra Combinational Circuits Logic Gates Logic Families and Memories Minimization Sequential Circuits Analog to Digital and Digital to Analog Converter Microprocessor
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