1
GATE EE 2009
MCQ (Single Correct Answer)
+2
-0.6
In $$8085$$ microprocessor, the contents of the Accumulator, after the following instructions are executed will become

$$\eqalign{ & XRA\,\,\,A \cr & MVI\,\,\,B\,\,\,F0\,\,\,H \cr & SUB\,\,\,B \cr} $$

A
$$01$$ $$H$$
B
$$0F$$ $$H$$
C
$$F0$$ $$H$$
D
$$10$$ $$H$$
2
GATE EE 2008
MCQ (Single Correct Answer)
+2
-0.6
The contents (in Hexadecimal) of some of the memory locations in an $$8085A$$ based system are given below GATE EE 2008 Digital Electronics - Microprocessor Question 9 English

The contents of stack pointer $$(SP),$$ program counter $$(PC)$$ and $$(HL)$$ are $$270H,$$ $$2100H$$ and $$0000H$$ respectively. When the following sequence of instructions are executed,
$$2100H:$$ $$DAD$$ $$SP$$
$$2101H;$$ $$PCHL$$

The contents of $$(SP)$$ and $$(PC)$$ at the end of execution will be

A
$$\left( {PC} \right) = 2102H,\,\,\left( {SP} \right) = 2700H$$
B
$$\left( {PC} \right) = 2700H,\,\,\left( {SP} \right) = 2700H$$
C
$$\left( {PC} \right) = 2800H,\,\,\left( {SP} \right) = 26FEH$$
D
$$\left( {PC} \right) =2A02H,\,\,\left( {SP} \right) = 2702H$$
3
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
In an $$8085$$ $$A$$ microprocessor based system, it is desired to increment the contents of memory location whose address is available in $$(D,E)$$ register pair and store the result in same location. The sequence of instructions is
A
$$XCHG,\,\,INR\,\,\,M$$
B
$$XCHG,\,\,INX\,\,\,H$$
C
$$INX\,\,D,\,\,XCHG$$
D
$$INR\,\,M,\,\,XCHG$$
4
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
Which one of the following statements regarding the $$INT$$ (interrupt) and the $$BRQ$$ (bus request) pins in a $$CPU$$ is true?
A
The $$BRQ$$ pin is sampled after every instruction cycle, but the $$INT$$ is sampled after every machine cycle
B
Both $$INT$$ and $$BRQ$$ are sampled after every machine cycle
C
The $$INT$$ pin is sampled after every instruction cycle, but the $$BRQ$$ is sampled after every machine cycle
D
Both $$INT$$ and $$BRQ$$ are sampled after every instruction cycle
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