The associated figure shows the two types of rotate right instruction $${R_1},\,{R_2}$$ available in a microprocessor where Register is a $$8$$-bit register and $$C$$ is the carry bit. The rotate left instructions $$L1$$ and $$L2$$ are similar except that $$C$$ now links the most significant bit of Register instead of the least significant one.

Such a division can be correctly performed by the following set of operations

A software delay subroutine is written as given below:

How many times $$DCR$$ $$L$$ instruction will be executed?

The $$8085$$ assembly language instruction that stores the content of $$H$$ and $$L$$ registers into the memory locations $$2050H$$ and $$2051H,$$ respectively, is

The following program is written for an $$8085$$ microprocessor to add two bytes located at memory addresses $$1FFE$$ and $$1FFF$$
$$\eqalign{ & LXI\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,H,\,\,\,1FFE \cr & MOV\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,B,\,\,\,M \cr & INR\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,L \cr & MOV\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,A,\,\,\,M \cr & ADD\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,B \cr & INR\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,L \cr & MOV\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,M,\,\,\,A \cr & XRA\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,A \cr} $$

On completion of the execution of the program, the result of additional is found.