1
GATE EE 2012
MCQ (Single Correct Answer)
+1
-0.3
Consider the given circuit. In this circuit, the race around
2
GATE EE 2002
MCQ (Single Correct Answer)
+1
-0.3
The frequency of the clock signal applied to the rising edge triggered $$D$$ flip-flop shown in Fig. is $$10$$ $$kHz.$$ The frequency of the signal available at $$Q$$ is
3
GATE EE 1995
Fill in the Blanks
+1
-0
For a $$J$$-$$K$$ flip-flop its $$J$$ input is tied to its own $$Q$$ output and its $$K$$ input is connected to its own $$Q$$ output. If the flip-flop is fed with a clock of frequency $$1$$ $$MHz,$$ its $$Q$$ output frequency will be ______________
Questions Asked from Sequential Circuits (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE EE Subjects
Electromagnetic Fields
Signals and Systems
Engineering Mathematics
General Aptitude
Power Electronics
Power System Analysis
Analog Electronics
Control Systems
Digital Electronics
Electrical Machines
Electric Circuits