1
GATE EE 2012
MCQ (Single Correct Answer)
+1
-0.3
The output $$Y$$ of a $$2$$ $$-$$ bit comparator is logic $$1$$ whenever the $$2$$-bit input $$A$$ is greater than the $$2$$-bit input $$B.$$ The number of combination for which the output is logic $$1$$, is
2
GATE EE 2011
MCQ (Single Correct Answer)
+1
-0.3
The output $$Y$$ of the logic circuit given below is
3
GATE EE 2003
MCQ (Single Correct Answer)
+1
-0.3
Figure shows a $$4$$ to $$1$$ $$MUX$$ to be used to implement the sum $$S$$ of a $$1$$-bit full adder with input bits $$P$$ and $$Q$$ and the carry input $${C_{in}}.$$ Which of the following combinations of inputs to $${{\rm I}_0},\,\,{{\rm I}_1},\,\,{{\rm I}_2}$$ and $$\,\,{{\rm I}_3}$$ of the $$MUX$$ will realize the sum $$S$$?
4
GATE EE 2001
MCQ (Single Correct Answer)
+1
-0.3
The output $$f$$ of the $$4$$- to- $$1$$ $$MUX$$ shown in fig. is
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Electric Circuits
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