1
GATE EE 2025
MCQ (Single Correct Answer)
+2
-0.67

In the circuit, shown below, if the values of $R$ and $C$ are very large, the form of the output voltage for a very high frequency square wave input, is best represented by

GATE EE 2025 Analog Electronics - Operational Amplifier Question 2 English
A
GATE EE 2025 Analog Electronics - Operational Amplifier Question 2 English Option 1
B
GATE EE 2025 Analog Electronics - Operational Amplifier Question 2 English Option 2
C
GATE EE 2025 Analog Electronics - Operational Amplifier Question 2 English Option 3
D
GATE EE 2025 Analog Electronics - Operational Amplifier Question 2 English Option 4
2
GATE EE 2025
Numerical
+2
-0

The op-amps in the following circuit are ideal. The voltage gain of the circuit is ___________. (Round off to the nearest integer)

GATE EE 2025 Analog Electronics - Operational Amplifier Question 3 English
Your input ____
3
GATE EE 2024
Numerical
+2
-0

A difference amplifier is shown in the figure. Assume the op-amp to be ideal. The CMRR (in dB) of the difference amplifier is ________ (rounded off to 2 decimal places).

GATE EE 2024 Analog Electronics - Operational Amplifier Question 4 English
Your input ____
4
GATE EE 2023
MCQ (Single Correct Answer)
+2
-0.67

Consider the OP AMP based circuit shown in the figure. Ignore the conduction drops of diodes $$D_1$$ and $$D_2$$. All the components are ideal and the breakdown voltage of the Zener is 5 V. Which of the following statements is true?

GATE EE 2023 Analog Electronics - Operational Amplifier Question 5 English

A
The maximum and minimum values of the output voltage $$V_0$$ are +15 V and $$-$$10 V, respectively.
B
The maximum and minimum values of the output voltage $$V_0$$ are +5 V and $$-$$15 V, respectively.
C
The maximum and minimum values of the output voltage $$V_0$$ are +10 V and $$-$$5 V, respectively.
D
The maximum and minimum values of the output voltage $$V_0$$ are +5 V and $$-$$10 V, respectively.
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