1
GATE EE 2014 Set 3
Numerical
+2
-0
A hysteresis type $$TTL$$ inverter is used to realize an oscillator in the circuit shown in the figure.
If the lower and upper trigger level voltages are $$0.9$$ $$V$$ and $$1.7$$ $$V,$$ the period (in $$ms$$), for which output is LOW, is ____________.
Your input ____
2
GATE EE 2014 Set 3
MCQ (Single Correct Answer)
+2
-0.6
The transfer characteristic of the Op-amp circuit shown in figure is
3
GATE EE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
In the figure shown, assume the op-amp to be ideal. Which of the alternatives gives the correct Bode plots for the transfer function $${{{V_O}\left( \omega \right)} \over {{V_i}\left( \omega \right)}}?$$
4
GATE EE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
Given the Op-amps in the figure of ideal, the output voltage $${V_0}$$ is


GATE EE Subjects
Browse all chapters by subject
Electric Circuits
Electrical Machines
Engineering Mathematics
Signals and Systems
Power Electronics
Power System Analysis
Digital Electronics
Analog Electronics
Electromagnetic Fields
Control Systems
Electrical and Electronics Measurement
General Aptitude