1
GATE CSE 2005
MCQ (Single Correct Answer)
+1
-0.3
Normally user programs are prevented from handling $${\rm I}/O$$ directly by $${\rm I}/O$$ instructions in them. For $$CPUs$$ having explicit $${\rm I}/O$$ instructions, such $${\rm I}/O$$ protection is ensured by having the $${\rm I}/O$$ instructions privileged. In a $$CPU$$ with memory mapped $${\rm I}/O$$, there is no explicit $${\rm I}/O$$ instruction. Which one of the following is true for a $$CPU$$ with memory mapped $${\rm I}/O$$ ?
A
$${\rm I}/O$$ protection is ensured by operating system routine(s)
B
$${\rm I}/O$$ protection is ensured by a hardware trap
C
$${\rm I}/O$$ protection is ensured during system configuration
D
$${\rm I}/O$$ protection is not possible
2
GATE CSE 2004
MCQ (Single Correct Answer)
+1
-0.3
How many $$8$$-bit characters can be transmitted per second over $$9600$$ baud serial communication link using a parity synchronous mode of transmission with one start bit & Eight data bits, two stop bits, and one parity bit
A
$$600$$
B
$$800$$
C
$$876$$
D
$$1200$$
3
GATE CSE 2004
MCQ (Single Correct Answer)
+1
-0.3
Which one of the following is true for a $$CPU$$ having a single interrupt request line and single interrupt grant line?
A
Neither vectored interrupt nor multiple interrupting devices are possible
B
Vectored interrupts are not possible but multiple interrupting devices are possible
C
Vectored interrupts and multiple interrupting devices are both possible
D
Vectored interrupt is possible but multiple interrupting devices are not possible
4
GATE CSE 2002
MCQ (Single Correct Answer)
+1
-0.3
In serial data transmission, every byte of data is padded with a $$‘0’$$ in the beginning and one or two $$‘1’s$$ at the end of byte because
A
Receiver is to be synchronized for byte reception
B
Receiver recovers lost $$‘0’s$$ and $$‘1’s$$ from these padded bits
C
Padded bits are useful in purity computation
D
None of the above
GATE CSE Subjects
Software Engineering
Web Technologies
EXAM MAP