Unless enabled, a $$CPU$$ will not be able to process interrupts.

Loop instructions cannot be interrupted till they complete.

A processor checks for interrupts before executing a new instruction.

Only level triggered interrupts are possible on microprocessors.

$$a - 4,\,\,b - 3,\,\,c - 1,\,\,d - 2$$

$$a - 2,\,\,b - 1,\,\,c - 3,\,\,d - 4$$

$$a - 4,\,\,b - 3,\,\,c - 2,\,\,d - 1$$

$$a - 2,\,\,b - 3,\,\,c - 4,\,\,d - 1$$

It gives non-uniform priority to various devices.

It gives uniform priority to all devices.

It is only useful for connecting slow devices to a processor

It requires a separate interrupt pin on the processor for each device.

The branch address is assigned to a fixed location in memory

The interrupting source supplies the branch information to the processor through an interrupt vector.

The branch address is obtained from a register in the processor.

None of these