1
GATE EE 2005
MCQ (Single Correct Answer)
+1
-0.3
If $${X_1}$$ and $${X_2}$$ are the inputs to the circuit shown in the figure, the output $$Q$$ is GATE EE 2005 Digital Electronics - Logic Families and Memories Question 3 English
A
$$\overline {{X_1} + {X_2}} $$
B
$$\overline {{X_1} \bullet {X_2}} $$
C
$$\overline {{X_1}} \bullet {X_2}$$
D
$${X_1} \bullet \overline {{X_2}} $$
2
GATE EE 1998
MCQ (Single Correct Answer)
+1
-0.3
In standard $$TTL$$ gates, the totem pole output stage is primarily used to
A
Increase the noise margin of the gate
B
Decrease the output switching delay
C
Facilitate a wired OR logic connection
D
Increase the output impedance of the circuit
3
GATE EE 1998
MCQ (Single Correct Answer)
+1
-0.3
The open collector outputs of two$$2$$-inputs $$NAND$$ gates are connected to a common pull up resistor. If the input to the gates are $$P,Q$$ and $$R,S$$ respectively, the output is equal to
A
$$\overline {PQ} \,.\,\overline {RS} $$
B
$$\overline {PQ} \,+\,\overline {RS} $$
C
$$PQ+RS$$
D
$$PQRS$$
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