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GATE ECE 2015 Set 2
Numerical
+1
-0
In the bistable circuit shown, the ideal opamp has saturation levels of $$ \pm 5V.$$ The value of R1 (in k$$\Omega $$ ) that gives a hystersis width of 500 mV is ______ GATE ECE 2015 Set 2 Analog Circuits - Operational Amplifier Question 76 English
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2
GATE ECE 2015 Set 2
Numerical
+2
-0
For the voltage regulator circuit shown, the input voltage (Vin) is 20V $$ \pm $$ 20% and the regulated output voltage (Vout) is 10 V. Assume the opamp to be ideal . For a load RL drawing 200 mA, the maximum power dissipation in Q1 (in Watts) is ______. GATE ECE 2015 Set 2 Analog Circuits - Operational Amplifier Question 36 English
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3
GATE ECE 2015 Set 2
Numerical
+1
-0
In the circuit shown, VO = VOA for switch SW in position A and V0= VOB for SW in position B. Assume that the opamp is ideal.

The value of $${{{V_{OB}}} \over {{V_{OA}}}}$$ is _____

GATE ECE 2015 Set 2 Analog Circuits - Operational Amplifier Question 77 English
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4
GATE ECE 2015 Set 2
MCQ (Single Correct Answer)
+2
-0.6
Consider a binary, digital communication system which uses pulses g (t) and − g (t)for transmitting bits over an AWGN channel. If the receiver uses a matched filter, which one of the following pulses will give the minimum probability of bit error?
A
GATE ECE 2015 Set 2 Communications - Noise In Digital Communication Question 14 English Option 1
B
GATE ECE 2015 Set 2 Communications - Noise In Digital Communication Question 14 English Option 2
C
GATE ECE 2015 Set 2 Communications - Noise In Digital Communication Question 14 English Option 3
D
GATE ECE 2015 Set 2 Communications - Noise In Digital Communication Question 14 English Option 4