The logic gate combination circuit shown in the figure performs the logic function of

When forward bias is applied to a p-n junction, then what happens to the potential barrier $$\left(V_B\right)$$ and the width $$(\mathrm{X})$$ of the depletion region?

In the study of transistor as an amplifier if $$\alpha=\frac{I_C}{I_E}=0.98$$ and $$\beta=\frac{I_C}{I_B}=49$$, where $$I_C, I_B$$ and $$\mathrm{I}_{\mathrm{E}}$$ are collector, base and emitter current respectively then $$\left(\frac{1}{\alpha}-\frac{1}{\beta}\right)$$ is equal to

If $$p$$-$$n$$ junction diode is in forward bias then