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1
MHT CET 2023 12th May Evening Shift
MCQ (Single Correct Answer)
+1
-0

In which figure, the junction diode is forward biased?

A
MHT CET 2023 12th May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 20 English Option 1
B
MHT CET 2023 12th May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 20 English Option 2
C
MHT CET 2023 12th May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 20 English Option 3
D
MHT CET 2023 12th May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 20 English Option 4
2
MHT CET 2023 12th May Morning Shift
MCQ (Single Correct Answer)
+1
-0

The following logic gate combination is equivalent to

MHT CET 2023 12th May Morning Shift Physics - Semiconductor Devices and Logic Gates Question 24 English

A
NAND gate
B
OR gate
C
XOR gate
D
NOT gate
3
MHT CET 2023 12th May Morning Shift
MCQ (Single Correct Answer)
+1
-0

The logic gate combination circuit shown in the figure performs the logic function of

MHT CET 2023 12th May Morning Shift Physics - Semiconductor Devices and Logic Gates Question 23 English

A
AND gate
B
NAND gate
C
OR gate
D
XOR gate
4
MHT CET 2023 12th May Morning Shift
MCQ (Single Correct Answer)
+1
-0

When forward bias is applied to a p-n junction, then what happens to the potential barrier $$\left(V_B\right)$$ and the width $$(\mathrm{X})$$ of the depletion region?

A
$$\mathrm{V}_{\mathrm{B}}$$ increase, $$\mathrm{X}$$ decreases
B
$$\mathrm{V}_{\mathrm{B}}$$ decreases, $$\mathrm{X}$$ increase
C
$$\mathrm{V}_{\mathrm{B}}$$ increase, $$\mathrm{X}$$ increase
D
$$\mathrm{V}_{\mathrm{B}}$$ decreases, $$\mathrm{X}$$ decreases
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