1
GATE CSE 2006
MCQ (Single Correct Answer)
+1
-0.3
You are given a free running clock with a duty cycle of $$50$$% and a digital waveform $$f$$ which changes only at the negative edge of the clock. Which one of the following circuits (using clocked $$D$$ flip-flops) will delay the phase of $$f$$ by $${180^0}?$$
2
GATE CSE 2004
MCQ (Single Correct Answer)
+1
-0.3
$$SR.$$ latch made by cross coupling two $$NAND$$ gates if $$S=R=0,$$ Then it will result in
Questions Asked from Sequential Circuits (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE CSE Subjects
Theory of Computation
Operating Systems
Algorithms
Database Management System
Data Structures
Computer Networks
Software Engineering
Compiler Design
Web Technologies
General Aptitude
Discrete Mathematics
Programming Languages