1
GATE CSE 2014 Set 2
MCQ (Single Correct Answer)
+1
-0.3
Let $$k = {2^n}.$$ A circuit is built by giving the output of an ݊$$n$$-bit binary counter as input to an $$n$$-to-$${2^n}$$ bit decoder. This circuit is equivalent to a
A
$$k$$-bit binary up counter.
B
$$k$$-bit binary down counter.
C
$$k$$-bit ring counter.
D
$$k$$-bit Johnson counter.
2
GATE CSE 2006
MCQ (Single Correct Answer)
+1
-0.3
You are given a free running clock with a duty cycle of $$50$$% and a digital waveform $$f$$ which changes only at the negative edge of the clock. Which one of the following circuits (using clocked $$D$$ flip-flops) will delay the phase of $$f$$ by $${180^0}?$$
A
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 1
B
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 2
C
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 3
D
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 4
3
GATE CSE 2004
MCQ (Single Correct Answer)
+1
-0.3
$$SR.$$ latch made by cross coupling two $$NAND$$ gates if $$S=R=0,$$ Then it will result in
A
$$Q=0,Q'=1$$
B
$$Q=1, Q'=0$$
C
$$Q=1, Q'=1$$
D
Indeterminate state
GATE CSE Subjects
Software Engineering
Web Technologies
EXAM MAP
Medical
NEET
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
CBSE
Class 12