Which of the following must be true for the $$RFE$$ (Return From Exception) instruction on a general purpose processor?
$$1.$$ It must be a trap instruction
$$2.$$ It must be a privileged instruction
$$3.$$ An exception cannot be allowed to occur during execution of an $$RFE$$ instruction.

Which of the following is/are true of the auto increment addressing mode?
$$1.$$ It is useful in creating self relocating code
$$2.$$ If it is included in an Instruction Set Architecture, then an additional $$ALU$$ is required for effective address calculation
$$3.$$ The amount of increment depends on the size of the data item accessed.

For all delayed conditional branch instructions, irrespective of whether the condition evaluate true or false,

Consider the following program segment. Here R1, R2 and R3 are the general purpose registers.

Assume that the content of memory location $$3000$$ is $$10$$ and the content of the register $$R3$$ is $$2000$$. The content of each of the memory locations from $$2000$$ to $$2010$$ is $$100.$$ The program is loaded from the memory location $$1000.$$ All the numbers are in decimal.

Assume that the memory is byte addressable and the word size is $$32$$ bits. If an interrupt occurs during the execution of the instruction $$''INC$$ $$R3'',$$ what return address will be pushed on to the stack?