Consider a processor with byte-addressable memory. Assume that all registers, including Program Counter $$(PC)$$ and Program Status Word $$(PSW),$$ are of size $$2$$ bytes. A stack in the main memory is implemented from memory location $${\left( {0100} \right)_{16}}$$ and it grows upward. The stack pointer $$(SP)$$ points to the top element of the stack. The current value of $$SP$$ is $${\left( {016E} \right)_{16}}$$. The CALL instruction is of two words, the first word is the op-code and the second word is the starting address of the subroutine (one word $$= 2$$ bytes). The CALL instruction is implemented as follows:

$$ \bullet \,\,\,\,\,\,\,\,$$ Store the current value of $$PC$$ in the stack
$$ \bullet \,\,\,\,\,\,\,\,$$ Store the value of $$PSW$$ register in the stack
$$ \bullet \,\,\,\,\,\,\,\,$$ Load the starting address of the subroutine in $$PC$$

The content of $$PC$$ just before the fetch of a CALL instruction is $$\left( {5FA0} \right){\,_{16}}.$$ After execution of the CALL instruction, the value of the stack pointer is

A machine has a $$32$$-bit architecture, with $$1$$-word long instructions. It has $$64$$ registers, each of which is $$32$$ bits long. It needs to support $$45$$ instructions, which have an immediate operand in addition to two register operands. Assuming that the immediate operand is an unsigned integer, the maximum value of the immediate operand is ____________.

Consider two processors ܲ$${P_1}$$ and $${P_2}$$ executing the same instruction set. Assume that under identical conditions, for the same input, a program running on $${P_2}$$ takes $$25$$% less time but incurs $$20$$% more $$CPI$$ (clock cycles per instruction) as compared to the program running on ܲ$${P_1}$$ If the clock frequency of ܲ$${P_1}$$ is $$1GHz,$$ then the clock frequency of $${P_2}$$ (in $$GHz$$) is _____________.

Consider a hypothetical processor with an instruction of type $$LW$$ $$R1, 20(R2),$$ which during execution reads a $$32$$-bit word from memory and stores it in a $$32$$-bit register $$R1.$$ The effective address of the memory location is obtained by the addition of a constant $$20$$ and the contents of register $$R2.$$ Which of the following best reflects the addressing mode implemented by this instruction for the operand in memory?