GATE CSE 2000 | Pipelining Question 36 | Computer Organization

GATE CSE 2000

MCQ (Single Correct Answer)

-0.3

Comparing the time $$T1$$ taken for a single instruction on a pipelined $$CPU$$ with time $$T2$$ taken on a non-pipelined but identical $$CPU,$$ we can say that

$$T1 \le T2$$

$$T1 \ge T2$$

$$T1 < T2$$

$$T1$$ is $$T2$$ plus the time taken for one instruction fetch cycle

GATE CSE Subjects

Theory of Computation

Undecidability Finite Automata and Regular Language Push Down Automata and Context Free Language Recursively Enumerable Language and Turing Machine

Operating Systems

Process Concepts and Cpu Scheduling Synchronization and Concurrency Deadlocks Memory Management File System IO and Protection

Algorithms

Complexity Analysis and Asymptotic Notations Searching and Sorting Divide and Conquer Method Greedy Method P and NP Concepts Dynamic Programming

Digital Logic

Number Systems Boolean Algebra K Maps Combinational Circuits Sequential Circuits

Database Management System

Structured Query Language Transactions and Concurrency Functional Dependencies and Normalization Relational Algebra File Structures and Indexing Er Diagrams

Data Structures

Arrays Stacks and Queues Linked List Trees Graphs Hashing

Computer Networks

Network Security Data Link Layer and Switching Application Layer Protocol Network Layer Routing Algorithm Concepts of Layering Lan Technologies and Wi-Fi TCP UDP Sockets and Congestion Control

Software Engineering

Compiler Design

Lexical Analysis Parsing Syntax Directed Translation Code Generation and Optimization

Web Technologies

General Aptitude

Numerical Ability Logical Reasoning Verbal Ability

Discrete Mathematics

Graph Theory Set Theory & Algebra Combinatorics Mathematical Logic Probability Linear Algebra Calculus

Programming Languages

Basic of Programming Language Function and Recursion Pointer and Structure in C

Computer Organization

Computer Arithmetic Memory Interfacing Pipelining Machine Instructions and Addressing Modes Alu Data Path and Control Unit IO Interface Secondary Memory