GATE EE 2015 Set 2 | Combinational Circuits Question 4 | Digital Electronics

GATE EE 2015 Set 2

MCQ (Single Correct Answer)

-0.6

A Boolean function $$f\left( {A,B,C,D} \right) = \Pi \left( {1,5,12,15} \right)$$ is to be implemented using an $$8 \times 1$$ multiplexer ($$A$$ is $$MSB$$). The inputs $$ABC$$ are connected to the select inputs $${S_2}{S_1}{S_0}$$ of the multiplexer respectively. GATE EE 2015 Set 2 Digital Electronics - Combinational Circuits Question 6 English

GATE EE 2015 Set 2 Digital Electronics - Combinational Circuits Question 6 English

Which one of the following options gives the correct inputs to pins $$0,1,2,3,4,5,6,7$$ in order?

$$D,\,0,\,D,\,0,\,0,\,0,\,\overline D ,D$$

$$\overline D ,\,1,\,\overline D ,\,1,\,1,\,1,\,D,\overline D $$

$$D,1,D,1,1,1,\overline D ,D$$

$$\overline D ,\,0,\,\overline D ,\,0,\,0,\,0,\,D,\,\overline D $$

GATE EE 2014 Set 3

MCQ (Single Correct Answer)

-0.6

Two monoshot multivibrators, one positive edge triggered $$\left( {{M_1}} \right)$$ and another negative edge triggered $$\left( {{M_2}} \right)$$ are connected as shown in figure. GATE EE 2014 Set 3 Digital Electronics - Combinational Circuits Question 8 English

GATE EE 2014 Set 3 Digital Electronics - Combinational Circuits Question 8 English

The monoshots $${{M_1}}$$ and $${{M_2}}$$ when triggered produce pulses of width $${{T_1}}$$ and $${{T_2}}$$ respectively, where $${T_1} > {T_2}.$$ The steady state output voltage $${V_0}$$ of the circuit is

GATE EE 2014 Set 3 Digital Electronics - Combinational Circuits Question 8 English Option 1

GATE EE 2014 Set 3 Digital Electronics - Combinational Circuits Question 8 English Option 2

GATE EE 2014 Set 3

MCQ (Single Correct Answer)

-0.6

A $$3$$-bit gray counter is used to control the output of the multiplexer as shown in the figure. The initial state of the counter is $${000_2}.$$ The output is pulled high. The output of the circuit follows the sequence GATE EE 2014 Set 3 Digital Electronics - Combinational Circuits Question 7 English

GATE EE 2014 Set 3 Digital Electronics - Combinational Circuits Question 7 English

$${{\rm I}_0},\,1,\,1,\,{{\rm I}_1},\,{{\rm I}_3},\,1,\,1,\,{{\rm I}_2}$$

$${{\rm I}_0},\,1,\,{{\rm I}_1},\,1,\,{{\rm I}_2},\,{{\rm I}_3},\,1$$

$$1,\,{{\rm I}_0},\,1,\,{{\rm I}_1},\,{{\rm I}_2},\,1,\,{{\rm I}_3},\,1$$

$${{\rm I}_0},\,{{\rm I}_1},\,{{\rm I}_2},\,{{\rm I}_3},\,{{\rm I}_0},\,{{\rm I}_1},\,{{\rm I}_2},\,{{\rm I}_3}$$

GATE EE 2008

MCQ (Single Correct Answer)

-0.6

A $$3$$ line to $$8$$ line decoder, with active low outputs, is used to implement a $$3$$- variable Boolean function as shown in the figure: The simplified form of Boolean function $$F(X,Y,Z)$$ implemented in 'Product of Sum' form will be GATE EE 2008 Digital Electronics - Combinational Circuits Question 2 English

GATE EE 2008 Digital Electronics - Combinational Circuits Question 2 English

$$\left( {x + z} \right).\left( {\overline x + \overline y + \overline z } \right).\left( {y + z} \right)$$

$$\left( {\overline x + \overline z } \right).\left( {x + y + z} \right).\left( {\overline y + \overline z } \right)$$

$$\left( {\overline x + \overline y + z} \right).\left( {\overline x + y + z} \right).\left( {x + \overline y + z} \right).\left( {x + y + \overline z } \right)$$

$$\left( {\overline x + \overline y + \overline z } \right).\left( {\overline x + y + \overline z } \right).\left( {x + y + z} \right).\left( {x + \overline y + \overline z } \right)$$