In the latch circuit shown, the NAND gates have non-zero, but unequal propagation delays. The present input condition is: P = Q = "0‟. If the input condition is changed simultaneously to P = Q = "1", the outputs X and Y are

A 4-bit shift register circuit configured for right-shift operation is $${D_{in}}\, \to \,A,\,A\, \to B,\,B \to C,\,C \to D,$$ is shown. If the present state of the shift register is ABCD = 1101, the number of clock cycles required to reach the state ABCD = 1111 is

A finite state machine (FSM) is implemented using the D flip-flops A and B and logic gates, as shown in the figure below. The four possible states of the FSM are Q_A Q_B = 00, 01, 10, and 11.

Assume that X_IN is held at a logic level throughout the operation of the FSM. When the FSM is initialized to the state Q_A Q_B = 100 and clocked, after a few clock cycles, it starts cycling through

The voltage of an electromagnetic wave propagating in a coaxial cable with uniform characteristic impedance is $$V(l) = {e^{ - \gamma l\, + \,j\,\omega \,t}}$$ Volts, where $$l$$ is the distance along the length of the cable in metres, $$\gamma = (0.1\, + \,j40)\,\,{m^{ - 1}}$$ is the complex propagation constant, and $$\omega = \,2\,\pi \,\, \times \,\,{10^9}$$ rad/s is the angular frequency. The absolute value of the attenuation in the cable in dB/metre is ___________________.