GATE ECE 2016 Set 2 | GATE ECE Year Wise Previous Years Questions

GATE ECE 2016 Set 2

Numerical

-0

The ordinary differential equation $$\,\,{{dx} \over {dt}} = - 3x + 2,\,\,$$ with $$x(0)=1$$ is to be solved using the forward Euler method. The largest time step that can be used to solve the equation without making the numerical solution unstable is _________.

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GATE ECE 2016 Set 2

Numerical

-0

Consider the complex valued function $$f\left( z \right) = 2{z^3} + b{\left| z \right|^3}$$ where $$z$$ is a complex variable. The value of $$b$$ for which the function $$f(z)$$ is analytic is __________.

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GATE ECE 2016 Set 2

MCQ (Single Correct Answer)

-0.6

An 8 Kbyte ROM with an active low Chip Select input CS is to be used in an 8085 microprocessor based system. The ROM should occupy the address range 1000H to 2FFFH. Theaddress lines are designated as A15 to A0, where A15is the most significant address bit.Which one of the following logicexpressions will generate the correct $$\overline{CS}$$ signal for this ROM?

$$A_{15}\;+\;A_{14}\;+\;(A_{13}.A_{12}+\overline{A_{13}}.\overline{A_{12}})$$

$$A_{15}.\;A_{14}.(A_{13}+A_{12})$$

$$\overline{A_{15}}.\;\overline{A_{14}}.(A_{13}.\overline{A_{12}}+\overline{A_{13}}.A_{12})$$

$$\overline{A_{15}}+\overline{A_{14}}+A_{13}A_{12}$$

GATE ECE 2016 Set 2

Numerical

-0

The figure shows an $$RLC$$ circuit with a sinusoidal current source. GATE ECE 2016 Set 2 Network Theory - Sinusoidal Steady State Response Question 35 English

GATE ECE 2016 Set 2 Network Theory - Sinusoidal Steady State Response Question 35 English

At response, the ratio $$\left| {{{\rm I}_L}} \right|/\left| {{{\rm I}_R}} \right|$$, i.e., the ratio of the magnitudes of the inductor current phasor and the resistor current phasor, is _________.

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