Transistor geometries in a CMOS inverter have been adjusted to meet the requirement for worst case charge and discharge times for driving a load capacitor C. This design is to be converted to that of a NOR circuit in the same technology, so that its worst case charge and discharge times while driving the same capacitor are similar. The channel lengths of all transistors are to be kept unchanged. Which one of the following statements is correct?

A long-channel NMOS transistor is biased in the linear region with V_DS = 50 mV and is used as a resistance. Which one of the following statements is NOT correct?

A voltage V_G is applied across a MOS capacitor with metal gate and p-type silicon substrate at T=300 K. The inversion carrier density (in number of carriers per unit area) for V_G = 0.8 V is $$2\,\, \times \,\,{10^{11}}\,\,\,\,\,\,c{m^{ - 2}}$$ . For $${V_G}\,\, = \,\,1.3\,\,V,$$ the inversion carrier density is $$4\,\,\, \times \,\,\,{10^{11}}\,\,\,\,c{m^{ - 2}}.$$ What is the value of the inversion carrier density for V_G = 1.8 V?

Consider a long-channel NMOS transistor with source and body connected together. Assume that the electron mobility is independent of V_GS and V_DS. Given,
g_m = 0.5$$\mu {\rm A}/V$$ for V_DS = 50 m V and V_GS = 2V,
g_d = $$8\mu {\rm A}/V$$ for V_GS = 2 V and V_DS = 0 V,
Where g_m =$${{\partial {{\rm I}_D}} \over {\partial {V_{GS}}}}\,\,and\,\,{g_d}\,\, = \,{{\partial {{\rm I}_D}} \over {\partial {V_{DS}}}}$$

The threshold voltage (in volts) of the transistor is