1
GATE ECE 2016 Set 2
Numerical
+2
-0
Consider a region of silicon devoid of electrons and holes, with an ionized donor density of $${\mathrm N}_\mathrm d^+=10^{17}\;\mathrm{cm}^{-3}$$. The electric field at x = 0 is 0 V/cm and the electric field at x = L is 50 kV/cm in the positive x direction. Assume that the electric field is zero in the y and z directions at all points. GATE ECE 2016 Set 2 Electronic Devices and VLSI - PN Junction Question 4 English

Given q = 1.6 × 10−19 coulomb, $$\varepsilon$$0 = 8.85 × 10−14 F/cm, $$\varepsilon$$r = 11.7 for silicon, the value of L in nm is ________.

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2
GATE ECE 2016 Set 2
MCQ (Single Correct Answer)
+1
-0.3
The Ebers-Moll model of a BJT is valid
A
only in active mode
B
only in active and saturation modes
C
only in active and cut-off modes
D
in active, saturation and cut-off modes
3
GATE ECE 2016 Set 2
MCQ (Single Correct Answer)
+1
-0.3
A long-channel NMOS transistor is biased in the linear region with VDS = 50 mV and is used as a resistance. Which one of the following statements is NOT correct?
A
If the device width W is increased, the resistance decreases.
B
If the threshold voltage is reduced, the resistance decreases.
C
If the device length L is increased, the resistance increases.
D
If VGS is increased, the resistance increases.
4
GATE ECE 2016 Set 2
MCQ (Single Correct Answer)
+1
-0.3
Transistor geometries in a CMOS inverter have been adjusted to meet the requirement for worst case charge and discharge times for driving a load capacitor C. This design is to be converted to that of a NOR circuit in the same technology, so that its worst case charge and discharge times while driving the same capacitor are similar. The channel lengths of all transistors are to be kept unchanged. Which one of the following statements is correct? GATE ECE 2016 Set 2 Electronic Devices and VLSI - IC Basics and MOSFET Question 44 English
A
Widths of PMOS transistors should be doubled, while widths of NMOS transistors should be halved.
B
Widths of PMOS transistors should be doubled, while widths of NMOS transistors should not be changed.
C
Widths of PMOS transistors should be halved, while widths of NMOS transistors should not be changed.
D
Widths of PMOS transistors should be unchanged, while widths of NMOS transistors should be halved.
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