GATE ECE 2014 Set 4 | GATE ECE Year Wise Previous Years Questions

GATE ECE 2014 Set 4

MCQ (Single Correct Answer)

-0.6

The state transition matrix $$\phi \left( t \right)$$ of a system $$$\left[ {\matrix{ {\mathop {{x_1}}\limits^ \bullet } \cr {\mathop {{x_2}}\limits^ \bullet } \cr } } \right] = \left[ {\matrix{ 0 & 1 \cr 0 & 0 \cr } } \right]\left[ {\matrix{ {{x_1}} \cr {{x_2}} \cr } } \right] is$$$

$$\left[ {\matrix{ t & 1 \cr 1 & 0 \cr } } \right]$$

$$\left[ {\matrix{ 1 & 0 \cr t & 1 \cr } } \right]$$

$$\left[ {\matrix{ 0 & 1 \cr 1 & t \cr } } \right]$$

$$\left[ {\matrix{ 1 & t \cr 0 & 1 \cr } } \right]$$

GATE ECE 2014 Set 4

MCQ (Single Correct Answer)

-0.3

In the circuit shown in the figure, if C = 0, the expression for Y is GATE ECE 2014 Set 4 Digital Circuits - Logic Gates Question 19 English

Y= $$A\overline B + \overline A B$$

Y=A+B

Y= $$\,\overline A \, \overline B $$

Y=A B

GATE ECE 2014 Set 4

Numerical

-0

A 16-bit ripple carry adder is realized using 16 identical full adders (FA) as shown in the figure. The carry-propagation delay of each FA is 12 ns and the sum-propagation delay of each FA is 15 ns. The worst case delay (in ns) of this 16-bit adder will be_______________. GATE ECE 2014 Set 4 Digital Circuits - Combinational Circuits Question 21 English

Your input ____

GATE ECE 2014 Set 4

MCQ (Single Correct Answer)

-0.6

An 8-to-1 multiplexer is used to implement a logical function Y as shown in the figure. The output Y is given by GATE ECE 2014 Set 4 Digital Circuits - Combinational Circuits Question 22 English

GATE ECE 2014 Set 4 Digital Circuits - Combinational Circuits Question 22 English

Y= A$$\overline B \,C + A\overline C D$$

$$Y = \overline A BC + A\overline B D$$

$$Y = AB\overline C + \overline A CD$$

$$Y = \overline A \,\overline B D + A\overline B C$$

PREVIOUS NEXT

GATE ECE Papers

2023