A 16-bit ripple carry adder is realized using 16 identical full adders (FA) as shown in the figure. The carry-propagation delay of each FA is 12 ns and the sum-propagation delay of each FA is 15 ns. The worst case delay (in ns) of this 16-bit adder will be_______________.

An 8-to-1 multiplexer is used to implement a logical function Y as shown in the figure. The output Y is given by

The output (Y) of the circuit shown in the figure is

For an antenna radiating in free space, the electric field at a distance of 1 km is found to be 12 m V/m. Given that intrinsic impedance of the free space is 120$$\pi \Omega $$, the magnitude of average power density due to this antenna at a ditance of 2 km from the antenna (in n W/$${m^2}$$) is