1
GATE ECE 2014 Set 4
Numerical
+2
-0
A 16-bit ripple carry adder is realized using 16 identical full adders (FA) as shown in the figure. The carry-propagation delay of each FA is 12 ns and the sum-propagation delay of each FA is 15 ns. The worst case delay (in ns) of this 16-bit adder will be_______________. GATE ECE 2014 Set 4 Digital Circuits - Combinational Circuits Question 21 English
Your input ____
2
GATE ECE 2014 Set 4
MCQ (Single Correct Answer)
+2
-0.6
An 8-to-1 multiplexer is used to implement a logical function Y as shown in the figure. The output Y is given by GATE ECE 2014 Set 4 Digital Circuits - Combinational Circuits Question 22 English
A
Y= A$$\overline B \,C + A\overline C D$$
B
$$Y = \overline A BC + A\overline B D$$
C
$$Y = AB\overline C + \overline A CD$$
D
$$Y = \overline A \,\overline B D + A\overline B C$$
3
GATE ECE 2014 Set 4
MCQ (Single Correct Answer)
+1
-0.3
The output (Y) of the circuit shown in the figure is GATE ECE 2014 Set 4 Digital Circuits - Logic Families Question 9 English
A
$$\overline A + \overline B + \overline C $$
B
$$A + \overline B \,\overline {.\,C} + A.\,\overline C $$
C
$$\overline A + B + \overline C $$
D
$$A.B.\overline C $$
4
GATE ECE 2014 Set 4
MCQ (Single Correct Answer)
+2
-0.6
If $$\overrightarrow{\mathrm E}=-\left(2\mathrm y^2\;-3\mathrm{yz}^2\right)\widehat{\mathrm x}\;-\left(6\mathrm{xy}^2-3\mathrm{xz}^2\right)\widehat{\mathrm y}+\left(6\mathrm{xyz}\right)\widehat{\mathrm z}$$

is the electric field in a source free region, a valid expression for the electrostatic potential is

A
xy3 - yz2
B
2xy3 - xyz2
C
y3 + xyz2
D
2xy3 - 3xyz2
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