1
GATE ECE 2002
Subjective
+5
-0
The block diagram of a linear time invariant system is given in Figure is GATE ECE 2002 Control Systems - State Space Analysis Question 8 English (a) Write down the state variable equations for the system in matrix form assuming the state vector to be $${\left[ {{x_1}\left( t \right)\,\,{x_2}\left( t \right)} \right]^T}$$
(b) Find out the state transition matrix.
(c) Determine y(t), t ≥ 0, when the initial values of the state at time t = 0 are $${x_1}$$(0) = 1, and $${x_2}$$(0) = 1.
2
GATE ECE 2002
MCQ (Single Correct Answer)
+1
-0.3
The number of comparators required in a 3-bit comparator type ADC is
A
2
B
3
C
7
D
8
3
GATE ECE 2002
Subjective
+5
-0
It is required to design a binary mod-5 synchronus counter using AB flip-flops such that the output Q2Q1Q0 changes as $$000 \to 001 \to 010$$ ........and so on. The excitation table for the AB flip-flops is given in the table GATE ECE 2002 Digital Circuits - Sequential Circuits Question 15 English 1 GATE ECE 2002 Digital Circuits - Sequential Circuits Question 15 English 2

(a) Write down the state table for the mod-5 counter.
(b)Obtain simplified SOP expressions for the inputs A2, B2, A1, B1, A0 and B0 in terms of Q2, Q1, Q and their complements.
(c) Hence, complete the circuit diagram for the mod-5 counter given in the figure using minimum number of 2-input NAND-gate only.

4
GATE ECE 2002
MCQ (Single Correct Answer)
+2
-0.6
If the input X$$_3$$, X$$_2$$, X$$_1$$, X$$_0$$ to the ROM in figure 2.12 are 8-4-2-1 BCD numbers, then the outpus are Y$$_3$$,Y$$_2$$, Y$$_1$$, Y$$_0$$ are GATE ECE 2002 Digital Circuits - Semiconductor Memories Question 4 English
A
gray code numbers
B
2-4-2-1 BCD numbers
C
excess-3 code numbeR
D
none of the above.
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