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1

### AIPMT 2012 Mains

To get an output Y= 1 in given circuit which of the following input will be correct ?

A
A $$\to$$ 1,  B $$\to$$ 0,  C $$\to$$ 0
B
A $$\to$$ 1,  B $$\to$$ 0,  C $$\to$$ 1
C
A $$\to$$ 1,  B $$\to$$ 1,  C $$\to$$ 0
D
A $$\to$$ 0,  B $$\to$$ 1,  C $$\to$$ 0

## Explanation

The Boolen expression for the given combination is

output Y = (A + B) · C

So it is clear that Y = 1, when A = 1, B = 0 and C = 1
2

### AIPMT 2012 Mains

The input resistance of a silicon transistor is 100 $$\Omega$$. Base current is changed by 40 $$\mu$$A which results in a change in collector current by 2 mA. This transistor is used as a common emitter amplifier with a load resistance of 4 k$$\Omega$$. The voltage gain of the amplifier is
A
2000
B
3000
C
4000
D
1000

## Explanation

Current gain ($$\beta$$) :

$$\beta$$ = $${{\Delta {I_C}} \over {\Delta {I_B}}}$$

= $${{2 \times {{10}^{ - 3}}} \over {40 \times {{10}^{ - 6}}}}$$ = 50

Voltage gain of the amplifier is

AV = $$\beta {{{R_L}} \over {{R_i}}}$$

= 50 $$\times$$ $${{4 \times {{10}^3}} \over {100}}$$ = 2000
3

### AIPMT 2012 Prelims

The figure shows a logic circuit with two inputs A and B and the output C. The voltage wave forms across A, B and C are as given. The logic circuit gate is
A
OR gate
B
NOR gate
C
AND gate
D
NAND gate

## Explanation

The truth table is
The logic circuit is OR gate.
4

### AIPMT 2012 Prelims

Transfer characteristics [output voltage (V0) vs input voltage (Vi)] for a base biased transistor in CE configuration is as shown in the figure. For using transistor as a switch, it is used

A
in region III
B
both in region (I) and (III)
C
in region II
D
in region I

## Explanation

In the given graph,

Region (I) – Cutoff region

Region (II) – Active region

Region (III) – Saturation region

Using transistor as a switch it is used in cutoff region or saturation region.

Using transistor as a amplifier it is used in active region.

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