GATE CSE 1990 | Boolean Algebra Question 50 | Digital Logic

GATE CSE 1990

MCQ (Single Correct Answer)

-0.6

Two $$NAND$$ gates having open collector outputs are tied together as shown in fig. The logic function $$Y,$$ implemented by the circuit is. GATE CSE 1990 Digital Logic - Boolean Algebra Question 21 English

GATE CSE 1990 Digital Logic - Boolean Algebra Question 21 English

$$Y = A\overline {BC} + \overline {DE} $$

$$Y = ABC + DE$$

$$Y = \overline {ABC} .\overline {DE} $$

$$Y = ABC\,.\,DE$$

GATE CSE Subjects

Theory of Computation

Undecidability Finite Automata and Regular Language Push Down Automata and Context Free Language Recursively Enumerable Language and Turing Machine

Operating Systems

Process Concepts and Cpu Scheduling Synchronization and Concurrency Deadlocks Memory Management File System IO and Protection

Algorithms

Complexity Analysis and Asymptotic Notations Searching and Sorting Divide and Conquer Method Greedy Method Dynamic Programming P and NP Concepts

Digital Logic

Number Systems Boolean Algebra K Maps Combinational Circuits Sequential Circuits

Database Management System

Er Diagrams Functional Dependencies and Normalization Structured Query Language Relational Algebra Transactions and Concurrency File Structures and Indexing

Data Structures

Arrays Stacks and Queues Linked List Trees Graphs Hashing

Computer Networks

Network Security Data Link Layer and Switching Application Layer Protocol Network Layer Routing Algorithm Concepts of Layering Lan Technologies and Wi-Fi TCP UDP Sockets and Congestion Control

Software Engineering

Compiler Design

Lexical Analysis Parsing Syntax Directed Translation Code Generation and Optimization

Web Technologies

General Aptitude

Numerical Ability Logical Reasoning Verbal Ability

Discrete Mathematics

Mathematical Logic Probability Set Theory & Algebra Combinatorics Linear Algebra Graph Theory Calculus

Programming Languages

Basic of Programming Language Function and Recursion Pointer and Structure in C

Computer Organization

Computer Arithmetic Memory Interfacing Machine Instructions and Addressing Modes IO Interface Pipelining Alu Data Path and Control Unit Secondary Memory