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1
GATE CSE 2010
MCQ (Single Correct Answer)
+1
-0.3
The Boolean expression for the output $$f$$ of the multiplexer shown below is GATE CSE 2010 Digital Logic - Combinational Circuits Question 18 English
A
$$\overline {P \oplus Q \oplus R} $$
B
$${P \oplus Q \oplus R}$$
C
$$P+Q+R$$
D
$$\overline {P + Q + R} $$
2
GATE CSE 2007
MCQ (Single Correct Answer)
+1
-0.3
How many $$3$$ to $$8$$ decodes with an enable input are needed to construct to constant $$6$$ to $$64$$ line decoder without using any other logic gates
A
$$7$$
B
$$8$$
C
$$9$$
D
$$10$$
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Theory of Computation
Undecidability Finite Automata and Regular Language Push Down Automata and Context Free Language Recursively Enumerable Language and Turing Machine
Operating Systems
Process Concepts and Cpu Scheduling Synchronization and Concurrency File System IO and Protection Deadlocks Memory Management
Algorithms
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Digital Logic
K Maps Boolean Algebra Combinational Circuits Number Systems Sequential Circuits
Database Management System
Structured Query Language Transactions and Concurrency Functional Dependencies and Normalization Relational Algebra File Structures and Indexing Er Diagrams
Data Structures
Trees Hashing Arrays Linked List Graphs Stacks and Queues
Computer Networks
Network Security Data Link Layer and Switching Application Layer Protocol Network Layer Routing Algorithm Concepts of Layering Lan Technologies and Wi-Fi TCP UDP Sockets and Congestion Control
Software Engineering
Software Engineering
Compiler Design
Lexical Analysis Parsing Syntax Directed Translation Code Generation and Optimization
Web Technologies
Web Technologies
General Aptitude
Numerical Ability Logical Reasoning Verbal Ability
Discrete Mathematics
Graph Theory Set Theory & Algebra Combinatorics Mathematical Logic Probability Linear Algebra Calculus
Programming Languages
Basic of Programming Language Function and Recursion Pointer and Structure in C
Computer Organization
Computer Arithmetic Memory Interfacing Machine Instructions and Addressing Modes IO Interface Pipelining Alu Data Path and Control Unit Secondary Memory
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