1
GATE CSE 2021 Set 2
MCQ (Single Correct Answer)
+1
-0.33

Which one of the following circuits implements the Boolean function given below?

f(x, y,z) = m0 + m1 + m3 +m4 + m5 + m6, where mi is the ith minterm.

A
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 1 English Option 1
B
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 1 English Option 2
C
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 1 English Option 3
D
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 1 English Option 4
2
GATE CSE 2020
Numerical
+1
-0.33
A multiplexer is placed between a group of 32 registers and an accumulator to regulate data movement such that at any given point in time the content of only one register will move to the accumulator. The minimum number of select lines needed for the multiplexer is _____.
Your input ____
3
GATE CSE 2020
Numerical
+1
-0.33
If there are m input lines and n output lines for a decoder that is used to uniquely address a byte addressable 1 KB RAM, then the minimum value of m + n is ____.
Your input ____
4
GATE CSE 2013
MCQ (Single Correct Answer)
+1
-0.3
In the following truth table $$V=1$$ if and only if the input is valid. GATE CSE 2013 Digital Logic - Combinational Circuits Question 14 English

What function does the truth table represent?

A
Priority encoder
B
Decoder
C
Multiplexer
D
Demultiplexer
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