State whether the following statements are TRUE or FALSE with reason. Transferring data in blocks from the main memory to the cache memory enables an interleaved main memory unit to operate unit at its maximum speed.

Match the pairs in the following Question.
$$\eqalign{ & \,\,\,\,\,\,\,\,\,\,\,\,\,\,\,List:\,{\rm I} \cr & \left( A \right)\,\,Criotical\,\,region \cr & \left( B \right)\,\,Wait/Signal \cr & \left( C \right)\,\,Working\,\,set \cr & \left( D \right)\,\,Deadlock \cr & \cr & \,\,\,\,\,\,\,\,\,\,\,\,\,\,\,List:\,{\rm I}{\rm I} \cr & \left( p \right)\,\,Hoare's\,\,monitor \cr & \left( q \right)\,\,Mutual\,\,exclusion \cr & \left( r \right)\,\,\Pr inciple\,\,of\,\,locality \cr & \left( s \right)\,\,Circular\,\,Wait \cr} $$

Match the pairs in the following question.

List - $${\rm I}$$
$$(A)$$$$\,\,\,\,$$ Virtual Memory
$$(B)$$$$\,\,\,\,$$ Shared memory
$$(C)$$$$\,\,\,\,$$ Look-ahead buffer
$$(D)$$$$\,\,\,\,$$ Look-aside buffer

List - $${\rm II}$$
$$(p)$$$$\,\,\,\,$$ Temporal locality
$$(q)$$$$\,\,\,\,$$ Spatial Locality
$$(r)$$$$\,\,\,\,$$ Address Translation
$$(s)$$$$\,\,\,\,$$ Mutual exclusion