1
GATE CSE 2023
Numerical
+2
-0.67

Consider a computer system with 57-bit virtual addressing using multi-level tree-structured page tables with L levels for virtual to physical address translation. The page size is 4 KB (1 KB = 1024 B) and a page table entry at any of the levels occupies 8 bytes.

The value of L is ____________.

Your input ____
2
GATE CSE 2022
MCQ (Single Correct Answer)
+2
-0.67

Which one of the following statements is FALSE?

A
The TLB performs an associative search in parallel on all its valid entries using page number of incoming virtual address.
B
If the virtual address of a word given by CPU has a TLB hit, but the subsequent search for the word results in a cache miss, then the word will always be present in the main memory.
C
The memory access time using a given inverted page table is always same for all incoming virtual addresses.
D
In a system that uses hashed page tables, if two distinct virtual addresses V1 and V2 map to the same value while hashing, then the memory access time of these addresses will not be the same.
3
GATE CSE 2022
Numerical
+2
-0

Consider a demand paging system with four page frames (initially empty) and LRU page replacement policy. For the following page reference string

7, 2, 7, 3, 2, 5, 3, 4, 6, 7, 7, 1, 5, 6, 1

the page fault rate, defined as the ratio of number of page faults to the number of memory accesses (rounded off to one decimal place) is _____________.

Your input ____
4
GATE CSE 2021 Set 1
MCQ (More than One Correct Answer)
+2
-0.67
In the context operating systems, which of the following statements is/are correct with respect to paging?
A
Paging incurs memory overheads.
B
Paging helps solve the issue of external fragmentation.
C
Page size has no impact on internal fragmentation.
D
Multi-level paging is necessary to support pages of different sizes.
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