1
GATE EE 2012
+2
-0.6
In the $$3$$-phase inverter circuit shown, the load is balanced and the gating scheme is $${180^ \circ }$$ -conduction mode. All the switching devices are ideal. If the $$dc$$ bus voltage $${V_d} = 300\,\,V,$$ the power consumed by $$3$$-phase load is

A
$$1.5$$ $$kW$$
B
$$2.0$$ $$kW$$
C
$$2.5$$ $$kW$$
D
$$3.0$$ $$kW$$
2
GATE EE 2012
+2
-0.6
In the $$3$$-phase inverter circuit shown, the load is balanced and the gating scheme is $${180^ \circ }$$ -conduction mode. All the switching devices are ideal. The $$rms$$ value of load phase voltage is

A
$$106.1$$ $$V$$
B
$$141.4$$ $$V$$
C
$$212.2$$ $$V$$
D
$$282.8$$ $$V$$
3
GATE EE 2009
+2
-0.6
The Current Source Inverter shown in Figure is operated by alternately turning on thyristor pairs $$\left( {{T_1},\,\,{T_2}} \right)$$ and $$\left( {{T_3},\,\,{T_4}} \right).$$ If the load is purely resistive, the theoretical maximum output frequency obtainable will be A
$$125$$ $$kHz$$
B
$$250$$ $$kHz$$
C
$$500$$ $$kHz$$
D
$$50$$ $$kHz$$
4
GATE EE 2008
+2
-0.6
A single phase voltage source inverter is feeding a purely inductive load as shown in the figure. The inverter is operated at $$50$$ $$Hz$$ in $${180^0}$$ square wave mode. Assume that the load current does not have any $$dc$$ component. The peak value of the inductor current $${i_0}$$ will be

A
$$6.37$$ $$A$$
B
$$10$$ $$A$$
C
$$20$$ $$A$$
D
$$40$$ $$A$$
GATE EE Subjects
Electromagnetic Fields
Signals and Systems
Engineering Mathematics
General Aptitude
Power Electronics
Power System Analysis
Analog Electronics
Control Systems
Digital Electronics
Electrical Machines
Electric Circuits
Electrical and Electronics Measurement
EXAM MAP
Joint Entrance Examination