A virtual memory system uses First In First Out (FIFO) page replacement policy and allocates a fixed number of frames to a process. Consider the following statements:
$$P:$$ Increasing the number of page frames allocated to a process sometimes increases the page fault rate.
$$Q:$$ Some programs do not exhibit locality of reference.

Which one of the following is TRUE?

A Computer system supports $$32$$-bit virtual addresses as well as $$32$$-bit physical addresses. Since the virtual address space is of the same size as the physical address space, the operating system designers decide to get rid of the virtual memory entirely. Which one of the following is true?

Consider a System with a two-level paging scheme in which a regular memory access takes $$150$$ nanoseconds, and servicing a page fault takes $$8$$ milliseconds. An average instruction takes $$100$$ nanoseconds of $$CPU$$ time, and two memory accesses. The $$TLB$$ hit ratio is $$90$$% and the page fault rate is one in every $$10,000$$ instructions. What is the effective average instruction execution time?

A processor uses $$2$$-level page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both $$32$$ bits wide. The memory is byte addressable. For virtual to physical address translation, the $$10$$ most significant bits of the virtual address are used as index into the first level page table while the next $$10$$ bits are used as index into the second level page table. The $$12$$ least significant bits of the virtual address are used as offset within thepage. Assume that the page table entries in both levels of page tables are $$4$$ bytes wide. Further, the processor has a translation look-aside buffer (TLB), with a hit rate of $$96$$%. The TLB caches recently used virtual page numbers and the corresponding physical page numbers. The processor also has a physically addressed cache with a hit rate of $$90$$%. Main memory access time is $$10$$ ns, cache access time is $$1$$ ns, and TLB access time is also $$1$$ ns.

Assuming that no page faults occur, the average time taken to access a virtual address is approximately (to the nearest $$0.5$$ ns)