1
GATE CSE 2015 Set 2
Numerical
+2
-0
A computer system implements $$8$$ kilobyte pages and a $$32$$-bit physical address space. Each page table entry contains a valid bit, a dirty bit, three permission bits, and the translation. If the maximum size of the page table of a process is $$24$$ megabytes, the length of the virtual address supported by the system is _______________ bits.
Your input ____
2
GATE CSE 2014 Set 3
Numerical
+2
-0
Consider a paging hardware with a TLB. Assume that the entire page table and all the pages are in the physical memory. It takes 10 milliseconds to search the TLB and 80 milliseconds to access the physical memory. If the TLB hit ratio is 0.6, the effective memory access time (in milliseconds) is______________.
Your input ____
3
GATE CSE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
A computer has twenty physical page frames which contain pages numbered $$101$$ through $$120.$$ Now a program accesses the pages numbered $$1, 2, …, 100$$ in that order, and repeats the access sequence THRICE. Which one of the following page replacement policies experiences the same number of page faults as the optimal page replacement policy for this program?
4
GATE CSE 2014 Set 1
Numerical
+2
-0
Assume that there are $$3$$ page frames which are initially empty. If the page reference string is $$1, 2, 3, 4, 2, 1, 5, 3, 2, 4, 6,$$ the number of page faults using the optimal replacement policy is______________.
Your input ____
Questions Asked from Memory Management (Marks 2)
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