In the circuit shown, diodes $${D_1}$$ ,$${D_2}$$ and $${D_3}$$ are ideal, and the inputs $${E_1}$$ , $${E_2}$$ and $${E_3}$$ are “0 V” for logic ‘0’ and “10 V” for logic ‘1’. What logic gate does the circuit represent?

An SR latch is implemented using TTL gates as shown in the figure. The set and reset pulse inputs are provided using the push-button switches. It is observed that the circuit fails to work as desired. The SR latch can be made functional by changing

A universal logic gate can implement any Boolean function by connecting sufficient number of them appropriately. Three gates are shown.

Which one of the following statesments is TRUE?

A three bit pseudo random number generator is shown. Initially the value of output Y = Y₂ Y₁ Y₀ is set to 111. The value of output Y after three clock cycles is