1
GATE EE 2025
MCQ (Single Correct Answer)
+1
-0.33
$$ \text { Assuming ideal op-smps, the circuit represents is } $$

2
GATE EE 2022
MCQ (Single Correct Answer)
+1
-0.33
The steady state output (Vout), of the circuit shown below, will

3
GATE EE 2015 Set 1
MCQ (Single Correct Answer)
+1
-0.3
Of the four characteristics given below, which are the major requirements for an instrumentation amplifier?
P. $$\,\,\,\,$$High common mode rejection ratio
Q. $$\,\,\,\,$$High input impedance
R. $$\,\,\,\,$$High linearity
S. $$\,\,\,\,$$High output impedance
P. $$\,\,\,\,$$High common mode rejection ratio
Q. $$\,\,\,\,$$High input impedance
R. $$\,\,\,\,$$High linearity
S. $$\,\,\,\,$$High output impedance
4
GATE EE 2015 Set 1
MCQ (Single Correct Answer)
+1
-0.3
Consider the circuit shown in the figure. In this circuit $$R = 1\,\,k\Omega ,$$ and $$C = 1\,\,\mu F.$$ The input voltage is sinusoidal with a frequency of $$50$$ $$Hz,$$ represented as a phasor with magnitude $${V_i}$$ and phase angle $$0$$ radian as shown in the figure. The output voltage is represented as a phasor with magnitude $${V_0}$$ and phase angle $$\delta $$ radian. What is the value of the output phase angle $$\delta $$ (in radian) relative to the phase angle of the input voltage?
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