If WL is the Word Line and BL the Bit Line, an SRAM cell is shown in

In the circuit shown, 𝑊𝑊 and 𝑌𝑌 are MSBs of the control inputs. The output 𝐹𝐹 is given by

If X and Y are inputs and the Difference (D = X – Y) and the Borrow (B) are the outputs, which one of the following diagrams implements a half-subtractor?

The circuit shown in the figure is a