1
GATE EE 2003
MCQ (Single Correct Answer)
+2
-0.6
The following equation defines a separately exited $$dc$$ motor in the form of a differential equation $${{{d^2}\omega } \over {d{t^2}}} + {{B\,d\omega } \over {j\,\,dt}} + {{{K^2}} \over {LJ}}\omega = {K \over {LJ}}{V_a}$$

The above equation may be organized in the state space form as follows
$$\left( {\matrix{ {{{{d^2}\omega } \over {d{t^2}}}} \cr {{{d\omega } \over {dt}}} \cr } } \right) = P\left( {\matrix{ {{{d\omega } \over {dt}}} \cr \omega \cr } } \right) + Q{V_a}$$

where the $$P$$ matrix is given by

A
$$\left( {\matrix{ { - {B \over J}} & { - {{{K^2}} \over {LJ}}} \cr 1 & 0 \cr } } \right)$$
B
$$\left( {\matrix{ { - {{{K^2}} \over {LJ}}} & { - {B \over J}} \cr 0 & 1 \cr } } \right)$$
C
$$\left( {\matrix{ 0 & 1 \cr { - {{{K^2}} \over {LJ}}} & { - {B \over J}} \cr } } \right)$$
D
$$\left( {\matrix{ 1 & 0 \cr { - {B \over J}} & { - {{{K^2}} \over {LJ}}} \cr } } \right)$$
2
GATE EE 2003
MCQ (Single Correct Answer)
+2
-0.6
The Boolean expression $$X\overline Y Z + XYZ + \overline X Y\overline Z + \overline X \overline Y Z + XY\overline Z $$ can be simplified to
A
$$X\overline Z + \overline X Z + YZ$$
B
$$XZ + \overline Y Z + Y\overline Z $$
C
$$\overline X Z + YZ + XZ$$
D
$$\overline X \overline Y + Y\overline Z + \overline X Z$$
3
GATE EE 2003
MCQ (Single Correct Answer)
+1
-0.3
Figure shows a $$4$$ to $$1$$ $$MUX$$ to be used to implement the sum $$S$$ of a $$1$$-bit full adder with input bits $$P$$ and $$Q$$ and the carry input $${C_{in}}.$$ Which of the following combinations of inputs to $${{\rm I}_0},\,\,{{\rm I}_1},\,\,{{\rm I}_2}$$ and $$\,\,{{\rm I}_3}$$ of the $$MUX$$ will realize the sum $$S$$? GATE EE 2003 Digital Electronics - Combinational Circuits Question 16 English
A
$${{\rm I}_0} = {{\rm I}_1} = {C_{in}};\,{{\rm I}_2} = {{\rm I}_3} = {\overline C _{in}}$$
B
$${{\rm I}_0} = {{\rm I}_1} = {\overline C _{in}};\,{{\rm I}_2} = {{\rm I}_3} = {C_{in}}$$
C
$${{\rm I}_0} = {{\rm I}_3} = {\overline C _{in}};\,{{\rm I}_1} = {{\rm I}_2} = {\overline C _{in}}$$
D
$${{\rm I}_0} = {{\rm I}_3} = {\overline C _{in}};\,{{\rm I}_1} = {{\rm I}_2} = {C_{in}}$$
4
GATE EE 2003
MCQ (Single Correct Answer)
+2
-0.6
The shift register shown in Fig. is initially loaded with the bit pattern $$1010.$$ Subsequently the shift register is clocked, and with each clock pulse the pattern gets shifted by one bit position to the right. With each shift, the bit at the serial input is pushed to the left most position $$(MSB).$$ After how many clock pulses will the content of the shift register become $$1010$$ again? GATE EE 2003 Digital Electronics - Sequential Circuits Question 17 English
A
$$3$$
B
$$7$$
C
$$11$$
D
$$15$$
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