The shift register shown in Fig. is initially loaded with the bit pattern $$1010.$$ Subsequently the shift register is clocked, and with each clock pulse the pattern gets shifted by one bit position to the right. With each shift, the bit at the serial input is pushed to the left most position $$(MSB).$$ After how many clock pulses will the content of the shift register become $$1010$$ again?

Figure shows a $$4$$ to $$1$$ $$MUX$$ to be used to implement the sum $$S$$ of a $$1$$-bit full adder with input bits $$P$$ and $$Q$$ and the carry input $${C_{in}}.$$ Which of the following combinations of inputs to $${{\rm I}_0},\,\,{{\rm I}_1},\,\,{{\rm I}_2}$$ and $$\,\,{{\rm I}_3}$$ of the $$MUX$$ will realize the sum $$S$$?

The Boolean expression $$X\overline Y Z + XYZ + \overline X Y\overline Z + \overline X \overline Y Z + XY\overline Z $$ can be simplified to

In the Fig. $${Z_1} = 10\angle - {60^ \circ },\,\,{Z_2} = 10\angle {60^ \circ },\,$$ $${Z_3} = 50\angle {53.13^ \circ }.\,\,$$ Thevenin's impedance seen from $$X-Y$$ is