The simplified block diagram of a $$10$$bit A/D converter of dual slope integrator type is shown in fig. The $$10$$-bit counter at the output is clocked by a $$1MHz$$ clock. Assuming negligible timing overhead for the control logic, the maximum frequency of the analog signal that can be converted using this A/D converter is approximately.

A dc series motor driving an electric train faces a constant power load. It is running at rated speed and rated voltage. If the speed has to be brought down to 0.25 p.u. the supply voltage has to be approximately brought down to

A single phase transformer has a maximum efficiency of 90% at full load and unity power factor. Efficiency at half load at the same power factor is

Figure shows an ideal single-phase transformer. The primary and secondary coils are wound on the core as shown. Turns ratio $$\left(\frac{N_1}{N_2}\right)$$=2. The correct phasors of voltages $$E_1,\;E_2$$ currents $$I_1,\;I_2$$ and core flux $$\phi$$ are as shown in