1
GATE EE 2003
+2
-0.6
A $$500$$ $$A/5$$ $$A,$$ $$50$$ $$Hz$$ current transformer has a bar primary. The secondary burden is a pure resistance of $$1\,\Omega$$ and it draws a current of $$5A$$. If the magnetic core requires $$250$$ AT for magnetization, the percentage ratio error is
A
$$10.56$$
B
$$-10.56$$
C
$$11.80$$
D
$$-11.80$$
2
GATE EE 2003
+2
-0.6
List $$-$$ $${\rm I}$$ represents the figures obtained on a $$CRO$$ screen when the voltage signals $$\,{V_X}\,\, = \,\,{V_{Xm}}\sin \,\,\omega t\,\,$$ and $$V_y^ \cdot \,\, = \,\,{V_{ym}}\sin \,\,\left( {\omega t + \Phi } \right)\,\,$$ are given to its $$X$$ and $$Y$$ plates respectively and $$\Phi$$ is changed. Choose the correct value of $$\Phi$$ from List $$-$$ $${\rm I}$$ to match with the corresponding figure of List $$-$$ $${\rm II}$$.  A
$$A = 1,\,B = 3,\,\,C = 6,\,\,D = 5$$
B
$$A = 2,\,B = 6,\,\,C = 4,\,\,D = 5$$
C
$$A = 2,\,B = 3,\,\,C = 5,\,\,D = 4$$
D
$$A = 1,\,B = 5,\,\,C = 6,\,\,D = 4$$
3
GATE EE 2003
+2
-0.6
The simplified block diagram of a $$10$$bit A/D converter of dual slope integrator type is shown in fig. The $$10$$-bit counter at the output is clocked by a $$1MHz$$ clock. Assuming negligible timing overhead for the control logic, the maximum frequency of the analog signal that can be converted using this A/D converter is approximately. A
$$2$$ $$kHz$$
B
$$1$$ $$kHz$$
C
$$500Hz$$
D
$$250Hz$$
4
GATE EE 2003
+2
-0.6
A dc series motor driving an electric train faces a constant power load. It is running at rated speed and rated voltage. If the speed has to be brought down to 0.25 p.u. the supply voltage has to be approximately brought down to
A
0.75 p.u.
B
0.5 p.u.
C
0.25 p.u.
D
0.125 p.u.
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