The components in the circuit given below are ideal. If $R=2 \mathrm{k} \Omega$ and $C=1 \mu \mathrm{~F}$, the -3 dB cut-off frequency of the circuit in Hz is

For the BJT in the amplifier shown below, $V_{B E}=0.7 \mathrm{~V}, \frac{k T}{q}=26 \mathrm{mV}$. Assume that the BJT output resistance ( $r_0$ ) is very high and the base current is negligible. The capacitors are also assumed to be short circuited at signal frequencies. The input $V_i$ is direct coupled. The low frequency voltage gain $\frac{V_0}{V_i}$ of the amplifier is

An enhancement MOSFET of threshold voltage 3 V is being used in the sample and hold circuit given below. Assume that the substrate of the MOS device is connected to -10 V . If the input voltage $v_1$ liesbetween $\pm 10 \mathrm{~V}$, the minimum and the maximum value of $v_G$ required for proper sampling and holding respectively, are

The random variable

$$ Y=\int_{-\infty}^{\infty} W(t) \phi(t) d t, \quad \text { where } \phi(t)=\left\{\begin{array}{cc} 1, & 5 \leq t \leq 7 \\ 0, & \text { otherwise } \end{array}\right. $$

and $W(t)$ is a real white Gaussian noise process with two-sided power spectral density $S_W(f)=3 \mathrm{~W} / \mathrm{Hz}$, for all $f$. The variance of $Y$ is $\_\_\_\_$ .