1
GATE ECE 2020
Numerical
+1
-0

In an 8085 microprocessor, the number of address lines required to access a 16 K bytes memory bank is

$\_\_\_\_$ .

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2
GATE ECE 2020
Numerical
+1
-0

In the given circuit, the two-port network has the impedance matrix $[Z]=\left[\begin{array}{cc}40 & 60 \\ 60 & 120\end{array}\right]$. The value of $Z_L$ for which maximum power is transferred to the load is $\_\_\_\_$ $\Omega$.

GATE ECE 2020 Network Theory - Two Port Networks Question 3 English
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3
GATE ECE 2020
MCQ (Single Correct Answer)
+1
-0.33

$$ \text { In the circuit shown below, the Thevenin voltage } V_{\text {th }} \text { is } $$

GATE ECE 2020 Network Theory - Network Theorems Question 4 English
A

4.5 V

B

3.6 V

C

2.4 V

D

2.8 V

4
GATE ECE 2020
Numerical
+1
-0

The current in the RL - circuit shown below is $i(t)=10 \cos (5 t-\pi / 4) \mathrm{A}$. The value of the inductor (rounded off to two decimal places) is $\_\_\_\_$ H.

GATE ECE 2020 Network Theory - Sinusoidal Steady State Response Question 4 English
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