In the three dimensional view of a silicon n-channel MOS transistor shown below, $$\delta = 20$$ nm. The transistor is of width 1 $$\mu m$$. The depletion width formed at every p-n junction is 10 nm. The relative permittivities of Si and SiO₂, respectively, are 11.7 and 3.9, and $${\varepsilon _0}$$ = 8.9 $$ \times {10^{ - 12}}$$ F/m.

The source-body junction capacitance is approximately

In the three dimensional view of a silicon n-channel MOS transistor shown below, $$\delta = 20$$ nm. The transistor is of width 1 $$\mu m$$. The depletion width formed at every p-n junction is 10 nm. The relative permittivities of Si and SiO₂, respectively, are 11.7 and 3.9, and $${\varepsilon _0}$$ = 8.9 $$ \times {10^{ - 12}}$$ F/m.

The gate-source overlap capacitance is approximately

In the CMOS circuit shown, electron and hole mobilities are equal, and M₁ and M₂ are equally sized. The device M₁ is in the linear region if

Given that $$A = \left[ {\matrix{ { - 5} & { - 3} \cr 2 & 0 \cr } } \right]$$ and $${\rm I} = \left[ {\matrix{ 1 & 0 \cr 0 & 1 \cr } } \right],$$ the value of $${A^3}$$ is