GATE ECE 2011 | GATE ECE Year Wise Previous Years Questions

GATE ECE 2011

MCQ (Single Correct Answer)

-0.3

When the output Y in the circuit below is ‘1’, it implies that data has

GATE ECE 2011 Digital Circuits - Sequential Circuits Question 54 English

changed from 0 to 1

changed from 1 to 0

changed in either direction

not changed

GATE ECE 2011

MCQ (Single Correct Answer)

-0.6

The output of a 3-stage Johnson (twisted-ring) counter is fed to a digital-to-analog (D/A) converter as shown in the figure below. Assume all the states of the counter to be unset initially. The waveform which represents the D/A converter output V_o is GATE ECE 2011 Digital Circuits - Sequential Circuits Question 35 English

GATE ECE 2011 Digital Circuits - Sequential Circuits Question 35 English

GATE ECE 2011 Digital Circuits - Sequential Circuits Question 35 English Option 1

GATE ECE 2011 Digital Circuits - Sequential Circuits Question 35 English Option 2

GATE ECE 2011

MCQ (Single Correct Answer)

-0.6

Two D flip-flops are connected as a synchronous counter that goes through the following Q_B Q_A sequence $$00 \to 11 \to 01 \to 10 \to 00 \to ......$$

$${D_A} = {Q_{B,}}\,{D_B} = {Q_A}$$

$${D_A} = {\overline Q _A},\,{D_B} = {\overline Q _B}$$

$${D_A} = \left( {{Q_A}\,{{\overline Q }_B}\, + {{\overline Q }_A}\,{Q_B}} \right),\,\,{D_B} = {Q_A}$$

$${D_A} = \left( {{Q_A}{Q_B} + {{\overline Q }_A}{{\overline Q }_B}} \right),\,\,{D_B} = {\overline Q _B}$$

GATE ECE 2011

MCQ (Single Correct Answer)

-0.3

The output Y in the circuit below is always ‘1’ when GATE ECE 2011 Digital Circuits - Logic Gates Question 22 English

two or more of the inputs P, Q, R are ‘0’

two or more of the inputs P, Q, R are ‘1

any odd number of the inputs P, Q, R is ‘0’

any odd number of the inputs P, Q, R is ‘1’

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