1
GATE ECE 2011
MCQ (Single Correct Answer)
+1
-0.3
The output Y in the circuit below is always ‘1’ when GATE ECE 2011 Digital Circuits - Logic Gates Question 21 English
A
two or more of the inputs P, Q, R are ‘0’
B
two or more of the inputs P, Q, R are ‘1
C
any odd number of the inputs P, Q, R is ‘0’
D
any odd number of the inputs P, Q, R is ‘1’
2
GATE ECE 2011
MCQ (Single Correct Answer)
+1
-0.3
The logic function implemented by the circuit below is (ground implies a logic "0" GATE ECE 2011 Digital Circuits - Combinational Circuits Question 38 English
A
F= AND (P, Q)
B
F= OR (P, Q)
C
F= XNOR (P, Q)
D
F= XOR (P, Q)
3
GATE ECE 2011
MCQ (Single Correct Answer)
+1
-0.3
When the output Y in the circuit below is ‘1’, it implies that data has

GATE ECE 2011 Digital Circuits - Sequential Circuits Question 51 English
A
changed from 0 to 1
B
changed from 1 to 0
C
changed in either direction
D
not changed
4
GATE ECE 2011
MCQ (Single Correct Answer)
+2
-0.6
Two D flip-flops are connected as a synchronous counter that goes through the following QB QA sequence $$00 \to 11 \to 01 \to 10 \to 00 \to ......$$
A
$${D_A} = {Q_{B,}}\,{D_B} = {Q_A}$$
B
$${D_A} = {\overline Q _A},\,{D_B} = {\overline Q _B}$$
C
$${D_A} = \left( {{Q_A}\,{{\overline Q }_B}\, + {{\overline Q }_A}\,{Q_B}} \right),\,\,{D_B} = {Q_A}$$
D
$${D_A} = \left( {{Q_A}{Q_B} + {{\overline Q }_A}{{\overline Q }_B}} \right),\,\,{D_B} = {\overline Q _B}$$
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