GATE CSE 1996 | Dynamic Programming Question 20 | Algorithms

GATE CSE 1996

MCQ (Single Correct Answer)

-0.6

A binary search tree is generated by inserting in order the following integers:

50, 15, 62, 5, 20, 58, 91, 3, 8, 37, 60, 24

The number of nodes in the left subtree and right subtree of the root respectively is

(4, 7)

(7, 4)

(8, 3)

(3, 8)

GATE CSE 1991

Subjective

-0

Obtain the optimal binary search tree with equal probabilities for the identifier set (a₁, a₂, a₃) = ( if, stop, while)

GATE CSE Subjects

Theory of Computation

Finite Automata and Regular Language Push Down Automata and Context Free Language Recursively Enumerable Language and Turing Machine Undecidability

Operating Systems

Process Concepts and Cpu Scheduling Synchronization and Concurrency File System IO and Protection Deadlocks Memory Management

Algorithms

Complexity Analysis and Asymptotic Notations Searching and Sorting Divide and Conquer Method Greedy Method P and NP Concepts Dynamic Programming

Digital Logic

Number Systems Boolean Algebra K Maps Combinational Circuits Sequential Circuits

Database Management System

Er Diagrams Functional Dependencies and Normalization Structured Query Language Relational Algebra Transactions and Concurrency File Structures and Indexing

Data Structures

Arrays Stacks and Queues Linked List Trees Graphs Hashing

Computer Networks

Concepts of Layering Lan Technologies and Wi-Fi Data Link Layer and Switching Network Layer Routing Algorithm TCP UDP Sockets and Congestion Control Application Layer Protocol Network Security

Software Engineering

Compiler Design

Lexical Analysis Parsing Syntax Directed Translation Code Generation and Optimization

Web Technologies

General Aptitude

Numerical Ability Logical Reasoning Verbal Ability

Discrete Mathematics

Mathematical Logic Probability Set Theory & Algebra Combinatorics Linear Algebra Graph Theory Calculus

Programming Languages

Basic of Programming Language Function and Recursion Pointer and Structure in C

Computer Organization

Computer Arithmetic Memory Interfacing Machine Instructions and Addressing Modes IO Interface Pipelining Alu Data Path and Control Unit Secondary Memory