1
GATE ECE 2014 Set 1
Numerical
+1
-0
Five JK flip - flops are cascaded to form circuit shown in figure. Clock pulses at a frequency of 1 MHz are applied as shown. The frequency (in kHz) of the waveform at Q3 is ______. GATE ECE 2014 Set 1 Digital Circuits - Sequential Circuits Question 56 English
Your input ____
2
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
The digital logic shown in the figure satisfies the given state diagram when Q1 is connected to input A of the XOR gate. GATE ECE 2014 Set 1 Digital Circuits - Sequential Circuits Question 33 English

Suppose the XOR gate is replaced by an XNOR gate. Which one of the following options preserves the state diagram?

A
Input A is connected to $${\overline Q _2}$$
B
Input A is connected to $${Q_2}$$
C
Input A is connected to $${\overline Q _1}$$ and S is complemented
D
Input A is connected to $${\overline Q _1}$$
3
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+1
-0.3
A two - port network has scattering parameters given by $$[S]$$ $$ = \left[ {\matrix{ {{s_{11}}} & {{s_{12}}} \cr {{s_{21}}} & {{s_{22}}} \cr } } \right].$$
If the port - 2 of the two - port is short circuited, the $${{s_{11}}}$$ parameter for the resultant one - port network is
A
$${{{s_{11}} - {s_{11}}{s_{22}} + {s_{12}}{s_{21}}} \over {1 + {s_{22}}}}$$
B
$${{{s_{11}} + {s_{11}}{s_{22}} - {s_{12}}{s_{21}}} \over {1 + {s_{22}}}}$$
C
$${{{s_{11}} + {s_{11}}{s_{22}} + {s_{12}}{s_{21}}} \over {1 - {s_{22}}}}$$
D
$${{{s_{11}} - {s_{11}}{s_{22}} + {s_{12}}{s_{21}}} \over {1 - {s_{22}}}}$$
4
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
For a parallel plate transmission line, let v be the speed of propagation and Z be the characteristic impedance. Neglecting fringe effects, a redution of the spacing between the plates by a factor of two results in
A
halving of v and no change in Z
B
no changes in v and halving of Z
C
no change in both v and Z
D
halving of both v and Z
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