1
GATE ECE 2014 Set 1
Numerical
+1
-0
Five JK flip - flops are cascaded to form circuit shown in figure. Clock pulses at a frequency of 1 MHz are applied as shown. The frequency (in kHz) of the waveform at Q3 is ______.
![GATE ECE 2014 Set 1 Digital Circuits - Sequential Circuits Question 56 English](https://gateclass.cdn.examgoal.net/examside/questions/5d16ef2f12547d00953d3f650abf7ea290fc8547870c8531aab809f091c828b9.jpg)
Your input ____
2
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
The digital logic shown in the figure satisfies the given state diagram when Q1 is connected to
input A of the XOR gate.
![GATE ECE 2014 Set 1 Digital Circuits - Sequential Circuits Question 33 English](https://gateclass.cdn.examgoal.net/examside/questions/bce4919328fad44af10dc600210360e6c1812df4e0b94438beb366abc5340d32.jpg)
Suppose the XOR gate is replaced by an XNOR gate. Which one of the following options preserves the state diagram?
3
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+1
-0.3
A two - port network has scattering parameters given by $$[S]$$ $$ = \left[ {\matrix{
{{s_{11}}} & {{s_{12}}} \cr
{{s_{21}}} & {{s_{22}}} \cr
} } \right].$$
If the port - 2 of the two - port is short circuited, the $${{s_{11}}}$$ parameter for the resultant one - port network is
If the port - 2 of the two - port is short circuited, the $${{s_{11}}}$$ parameter for the resultant one - port network is
4
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
For a parallel plate transmission line, let v be the speed of propagation and Z be the characteristic impedance. Neglecting fringe effects, a redution of the spacing between the plates by a factor of two results in
Paper analysis
Total Questions
Analog Circuits
7
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Control Systems
5
Digital Circuits
5
Electromagnetics
3
Electronic Devices and VLSI
5
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10
Network Theory
6
Signals and Systems
7
General Aptitude
5
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